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authorGeert Uytterhoeven <[email protected]>2016-09-29 14:47:58 +0200
committerGeert Uytterhoeven <[email protected]>2017-03-30 13:25:24 +0200
commit48d0341e41870bcfc42206d38e00a6b1c2fea929 (patch)
tree5212a15c00949b30e9f4a0a1e24709c0d0ff9a5e /tools/perf/scripts/python
parentcecbe87d73006cb321dec79b349e3fefd1a80962 (diff)
clk: renesas: cpg-mssr: Add support for fixing up clock tables
The same SoC may have different clocks and/or module clock parents, depending on SoC revision. One option is to use different sets of clock tables for each SoC revision. However, if the differences are small, it is much more space-efficient to have a single set of clock tables, and fix those up at runtime instead. Hence provide three helpers: - Two helpers to NULLify core and module clocks that do not exist on some revisions (NULLified clocks are skipped during the registration phase), - One helper to reparent module clocks that have different clock parents. Signed-off-by: Geert Uytterhoeven <[email protected]>
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