diff options
| author | Jesse Barnes <[email protected]> | 2013-03-28 09:55:41 -0700 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2013-04-02 20:54:31 +0200 |
| commit | 453c542059cfa1988cabcf84f715307cd9789163 (patch) | |
| tree | 5d6019f071131d1e4f8e7953e62918f4127c622f /tools/perf/scripts/python | |
| parent | b2634017b2df5e45567811b5e82eb0c8ce8e5ebd (diff) | |
drm/i915: panel power sequencing for VLV eDP v2
PPS register offsets have changed in Valleyview.
v2: don't clobber port select bits on VLV when fixing up PPS timings
don't bother with G4x PPS regs (Jani)
Signed-off-by: Jesse Barnes <[email protected]>
Signed-off-by: Gajanan Bhat <[email protected]>
Signed-off-by: Vijay Purushothaman <[email protected]>
Signed-off-by: Ben Widawsky <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions