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authorHaiying Wang <[email protected]>2009-04-29 14:14:35 -0400
committerKumar Gala <[email protected]>2009-05-19 00:50:23 -0500
commit345f84227b50e90329dd303499024603596566f4 (patch)
tree609868e873f374aacdbb58a37db8de4517bf4d8e /tools/perf/scripts/python
parent06c4435021f4856261edd01e2691071edeb8fa51 (diff)
net/ucc_geth: update riscTx and riscRx in ucc_geth
Change the definition of riscTx and riscRx to unsigned integer instead of enum, and change their values to support 4 risc allocation if the qe has 4 RISC engines. Signed-off-by: Haiying Wang <[email protected]> Acked-by: David S. Miller <[email protected]> Signed-off-by: Kumar Gala <[email protected]>
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