diff options
| author | Hauke Mehrtens <[email protected]> | 2014-07-28 23:53:57 +0200 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2014-07-30 19:24:28 +0200 |
| commit | 316cad5c1d4daee998cd1f83ccdb437f6f20d45c (patch) | |
| tree | e3f8adde1c3927ee8a79cb36f2925423385f690f /tools/perf/scripts/python | |
| parent | 1bc2d3e38e5bf90af4e9d64e1696f2d39757355a (diff) | |
MIPS: BCM47XX: make reboot more relaiable
The reboot on the BCM47XX SoCs is done, by setting the watchdog counter
to 1 and let it trigger a reboot, when it reaches 0. Some devices with
a BCM4705/BCM4785 SoC do not reboot when the counter is set to 1 and
decreased to 0 by the hardware. It looks like it works more reliable
when we set it to 3. As far as I understand the hardware, this should
not make any difference, but I do not have access to any documentation
for this SoC.
It is still not 100% reliable.
Signed-off-by: Hauke Mehrtens <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/7488/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions