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authorHeiko Stuebner <[email protected]>2016-03-14 16:01:59 +0800
committerDavid S. Miller <[email protected]>2016-03-16 19:28:02 -0400
commit2c6fae2501d87ca94b5249df38797f02d4e39add (patch)
treed18c9627729a174e81fcdf362bc4b1766307e762 /tools/perf/scripts/python
parentf7e180222b973a0b363564b281a314276cb2b594 (diff)
clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036
The emac needs constant and very specific rate but the possible PLL-sources are very limited, so we expect the PLL source to be set manually on per board and don't want it to get changed in an automatic way later. So add the necessary clock-id and disable reparenting on set_rate calls. Signed-off-by: Heiko Stuebner <[email protected]> Cc: Michael Turquette <[email protected]> Cc: Heiko Stuebner <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: [email protected] Signed-off-by: Caesar Wang <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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