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authorPali Rohár <[email protected]>2021-10-05 20:09:52 +0200
committerLorenzo Pieralisi <[email protected]>2021-10-07 14:27:59 +0100
commit2b650b7ff20eb7ea8ef9031d20fb657286ab90cc (patch)
tree869ce69455ad6930e85148322c65c2029ac9bce0 /tools/perf/scripts/python
parent661c399a651c11aaf83c45cbfe0b4a1fb7bc3179 (diff)
PCI: aardvark: Fix reporting Data Link Layer Link Active
Add support for reporting PCI_EXP_LNKSTA_DLLLA bit in Link Control register on emulated bridge via current LTSSM state. Also correctly indicate DLLLA capability via PCI_EXP_LNKCAP_DLLLARC bit in Link Control Capability register. Link: https://lore.kernel.org/r/[email protected] Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space") Signed-off-by: Pali Rohár <[email protected]> Signed-off-by: Marek Behún <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Marek Behún <[email protected]> Cc: [email protected]
Diffstat (limited to 'tools/perf/scripts/python')
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