aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python
diff options
context:
space:
mode:
authorHari Nagalla <[email protected]>2023-05-02 18:15:26 -0500
committerVignesh Raghavendra <[email protected]>2023-06-14 13:05:45 +0530
commit257d206b6d117d8e40742dc17ae02406747753ad (patch)
treef4c7c27dc9fafc36ff5b1c89711c5c66366b71f8 /tools/perf/scripts/python
parent7e5fd896c3d1ecf7b806f5fd42245c1135fe878d (diff)
arm64: dts: ti: k3-j784s4-main: Add C71x DSP nodes
The J784S4 SoCs have four TMS320C71x DSP subsystems in the MAIN voltage domain. The functionality of these DSP subsystems is similar to the C71x DSP subsystems on earlier k3 device J721S2. Each subsystem has a 48 KB of L1D configurable SRAM/Cache and 512 KB of L2 SRAM/Cache. This subsystem has a CMMU but is not currently used. The inter-processor communication between the main A72 cores and the C71x DSPs is achieved through shared memory and mailboxes. Add the DT nodes for these DSP processor sub-systems. Signed-off-by: Hari Nagalla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vignesh Raghavendra <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions