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| author | Radhey Shyam Pandey <[email protected]> | 2020-01-29 13:15:09 +0530 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2020-02-24 22:23:48 +0530 |
| commit | 2575cb81a9662ab69ad4a66e29cbc9708d6cc90c (patch) | |
| tree | ca944ad0f4fe3cab169c77f343acaa2c6417d3ad /tools/perf/scripts/python | |
| parent | 6cc7089764ab88784cd82895d819e882f01942ce (diff) | |
dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all
Reset DMA channel after stop to ensure that pending transfers and FIFOs
in the datapath are flushed or completed. It also cleanup the terminate
path and removes stop for the cyclic mode as after the reset stop is not
required. This fixes intermittent data verification failure when xilinx
dma test the client is stressed and loaded/unloaded multiple times.
Signed-off-by: Radhey Shyam Pandey <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions