powerpc/mm/cxl: Add barrier when setting mm cpumask

We need to add memory barrier so that the page table walk doesn't happen
before the cpumask is set and made visible to the other cpus. We need
to use a sync here instead of lwsync because lwsync is not sufficient for
store/load ordering.

We also need to add an if (mm) check so that we do the right thing when called
with a kernel context. For kernel context, we have mm = NULL. W.r.t kernel
address we can skip setting the mm cpumask.

Fixes: 0f4bc0932e ("powerpc/mm/cxl: Add the fault handling cpu to mm cpumask")
Cc: Andrew Donnellan <[email protected]>
Reported-by: Benjamin Herrenschmidt <[email protected]>
Reported-by: Dan Carpenter <[email protected]>
Signed-off-by: Aneesh Kumar K.V <[email protected]>
Acked-by: Andrew Donnellan <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>

0 files changed, 0 insertions, 0 deletions