diff options
| author | Ben Widawsky <[email protected]> | 2013-09-20 09:35:30 -0700 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2013-10-01 07:45:12 +0200 |
| commit | 18b5992c37560dffc52b84dec7f83738847cf5c7 (patch) | |
| tree | f4942bc743519306af364d2d154e3e7ab3786ed6 /tools/perf/scripts/python | |
| parent | 50003939b5a45df44b3b4bd1ccd46e3c50aa5e65 (diff) | |
drm/i915: Calculate PSR register offsets from base + gen
Future generations will be changing these registers (thanks to design
for giving us an early heads up). To help abstract, create the
definition of the base of the register block, and define all registers
relative to that.
Design has promised to not change the offsets relative to the base.
v2: Also change IS_HASWELL checks to HAS_PSR
CC: Rodrigo Vivi <[email protected]>
CC: Intel GFX <[email protected]>
Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions