diff options
| author | Tvrtko Ursulin <[email protected]> | 2019-07-17 19:06:19 +0100 |
|---|---|---|
| committer | Tvrtko Ursulin <[email protected]> | 2019-07-19 15:35:18 +0100 |
| commit | 15160879d47213c32f357bc67b6014d9aaf14ed7 (patch) | |
| tree | 2391422eaff7664067d4f9d614fba1e3d805b7cd /tools/perf/scripts/python | |
| parent | 0d392cb9eb58099496a4d2981047df7ff7d22949 (diff) | |
drm/i915: Fix GEN8_MCR_SELECTOR programming
fls returns bit positions starting from one for the lsb and the MCR
register expects zero based (sub)slice addressing.
Incorrent MCR programming can have the effect of directing MMIO reads of
registers in the 0xb100-0xb3ff range to invalid subslice returning zeroes
instead of actual content.
Signed-off-by: Tvrtko Ursulin <[email protected]>
Fixes: 1e40d4aea57b ("drm/i915/cnl: Implement WaProgramMgsrForCorrectSliceSpecificMmioReads")
Reviewed-by: Chris Wilson <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions