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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-11-09 16:26:14 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-12-10 08:34:01 +0100 |
commit | 14653942de7f63e21ece32e3901f09a248598a43 (patch) | |
tree | c92337362caa9059dbc82416cbf8c5b0ad1cc6a0 /tools/perf/scripts/python | |
parent | b5fb3b8859a491ff31e933927809f17a4e39459f (diff) |
clk: renesas: r8a779a0: Fix R and OSC clocks
The R-Car V3U clock driver defines the R and OSC clocks using R-Car Gen3
clock types. However, The R-Car V3U clock driver does not use the R-Car
Gen3 clock driver core, hence registering the R and OSC clocks fails:
renesas-cpg-mssr e6150000.clock-controller: Failed to register core clock osc: -22
renesas-cpg-mssr e6150000.clock-controller: Failed to register core clock r: -22
Fix this by introducing clock definition macros specific to R-Car V3U.
Note that rcar_r8a779a0_cpg_clk_register() already handled the related
clock types. Drop the now unneeded include of rcar-gen3-cpg.h.
Fixes: 17bcc8035d2d19fc ("clk: renesas: cpg-mssr: Add support for R-Car V3U")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20201109152614.2465483-1-geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions