diff options
| author | Colin Cross <[email protected]> | 2010-09-08 19:41:58 -0700 |
|---|---|---|
| committer | Colin Cross <[email protected]> | 2011-02-20 23:36:50 -0800 |
| commit | 14133add42928d6759f35f5d94938adf2cda2bb6 (patch) | |
| tree | c582a98713a64f76de87106675aa6061be3b0e3c /tools/perf/scripts/python | |
| parent | 2b84cb4faab698b1708ce841c554546b1c9b2261 (diff) | |
ARM: tegra: clock: Don't BUG on changing an enabled PLL
When updating the CPU PLL frequency, keeping the PLL enabled avoids
ramping the PLL all the way down and back up again. Remove the BUG_ON
in tegra2_pll_clk_set_rate to allow the rate to change while the PLL
is enabled.
Acked-by: Olof Johansson <[email protected]>
Signed-off-by: Colin Cross <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions