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| author | Manivannan Sadhasivam <[email protected]> | 2023-03-14 13:34:35 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-03-15 15:17:21 -0700 |
| commit | 0fe0955a79b994b8dcabe79f3a7192251fb256ea (patch) | |
| tree | 3d2d4ffeb5fedd5128b4efca6eb92358c5801062 /tools/perf/scripts/python | |
| parent | 62e5ee9db98ed67eb50205072135544055cba9c4 (diff) | |
arm64: dts: qcom: sc8280xp: Fix the base addresses of LLCC banks
The LLCC block has several banks each with a different base address
and holes in between. So it is not a correct approach to cover these
banks with a single offset/size. Instead, the individual bank's base
address needs to be specified in devicetree with the exact size.
Reported-by: Parikshit Pareek <[email protected]>
Tested-by: Steev Klimaszewski <[email protected]> # Thinkpad X13s
Tested-by: Andrew Halaney <[email protected]> # sa8540p-ride
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions