drm/amd/display: add support for per-state dummy-pstate latency

[why]
Dummy pstate latency actually varies between different
UCLK frequencies, when calculating watermark C, if DAL
always assumes worst case, then it can lead to dummy
pstate not supported scenarios.

[how]
Rather than statically calculating dummy pstate using
worst case, we store the entire table of UCLK to dummy
pstate relationships.  On a per mode basis, we calculate
the actual UCLK lower limit, and use the dynamic worst
case dummy pstate latency.  This prevents the situation
where we don't support full p-state (which will force
high DPM), but still use low DPM dummy pstate latency.

Signed-off-by: Jun Lei <[email protected]>
Reviewed-by: Joshua Aberback <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

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