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authorChanwoo Choi <[email protected]>2015-02-02 23:24:01 +0900
committerSylwester Nawrocki <[email protected]>2015-02-04 18:58:11 +0100
commit06d2f9dfa663367e8cc1690d7e5ce4113e5dbcc1 (patch)
treec691b7076f3a94d18ddc7279e8a0416c2f9e4a90 /tools/perf/scripts/python
parenta29308dad5dc4695a344ed9042cae8a1b8e35267 (diff)
clk: samsung: exynos5433: Add clocks for CMU_MIF domain
This patch adds the mux/divider/gate clocks of CMU_MIF domain which includes the clocks for DMC(DRAM memory controller) and CCI(Cache Coherent Interconnect). The CMU_MIF domain provides the source clocks for CMU_DISP/CMU_BUS2. Signed-off-by: Chanwoo Choi <[email protected]> Acked-by: Inki Dae <[email protected]> Signed-off-by: Sylwester Nawrocki <[email protected]>
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