diff options
| author | Holger Brunck <[email protected]> | 2017-05-17 17:24:38 +0200 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2017-05-18 10:28:39 -0400 |
| commit | 067bb938dad61e58fc3d6a0e090b72ec011851cd (patch) | |
| tree | 617e9b79f94dfe0cdff171fae024b7f13353b657 /tools/perf/scripts/python | |
| parent | c7f235a7c2d09b1b83671ba2d93ebee981554467 (diff) | |
net/wan/fsl_ucc_hdlc: add hdlc-bus support
This adds support for hdlc-bus mode to the fsl_ucc_hdlc driver. This can
be enabled with the "fsl,hdlc-bus" property in the DTS node of the
corresponding ucc.
This aligns the configuration of the UPSMR and GUMR registers to what is
done in our ucc_hdlc driver (that only support hdlc-bus mode) and with
the QuickEngine's documentation for hdlc-bus mode.
GUMR/SYNL is set to AUTO for the busmode as in this case the CD signal
is ignored. The brkpt_support is enabled to set the HBM1 bit in the
CMXUCR register to configure an open-drain connected HDLC bus.
Signed-off-by: Holger Brunck <[email protected]>
Cc: Zhao Qiang <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions