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authorSherry Sun <sherry.sun@nxp.com>2023-01-30 14:44:46 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-01-31 10:53:39 +0100
commit9ad9df8447547febe9dd09b040f4528a09e495f0 (patch)
treef4c73fe2e61006166280d817a628b160638f3ce8 /tools/perf/scripts/python/task-analyzer.py
parent7c0105901778500f6d11ddfd99f6efa1987c37a6 (diff)
tty: serial: fsl_lpuart: Fix the wrong RXWATER setting for rx dma case
The RXWATER value must be greater than 0 according to the LPUART reference manual. And when the number of datawords in the receive FIFO is greater than RXWATER, an interrupt or a DMA request is generated, so no need to set the different value for lpuart interrupt case and dma case. Here delete the wrong RXWATER setting for dma case directly. Fixes: 42b68768e51b ("serial: fsl_lpuart: DMA support for 32-bit variant") Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Link: https://lore.kernel.org/r/20230130064449.9564-4-sherry.sun@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
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