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authorTejas Upadhyay <[email protected]>2023-06-06 15:48:38 +0530
committerRodrigo Vivi <[email protected]>2023-12-21 11:35:06 -0500
commit8c82f914a302e394e2a037241d84ca3af6577f97 (patch)
treefd9862209f64ab6bea45461bf0362565fefd3818 /tools/perf/scripts/python/task-analyzer.py
parente5a845fd8fa4ce61a99c87f37b63530fa4995750 (diff)
drm/xe: Add GTs under respective tile sysfs
With the separation of xe_tile and xe_gt, We now consider a PCI device (xe_device) to contain one or more tiles (struct xe_tile). Each tile will contain one or more GTs (struct xe_gt). So lets align sysfs paths accordingly. TODO: Currently we have gt0 under tile0 and gt1 under tile1 on multi-tile. This GT indexing still under discussion, when it is concluded we need to revisit this change. Reviewed-by: Aravind Iddamsetty <[email protected]> Signed-off-by: Tejas Upadhyay <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
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