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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2024-05-30 18:38:45 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2024-06-11 09:45:19 +0200
commit8081a03793d3276c50d55a6f561872168eccf944 (patch)
tree2497577ed7865948d1f30f88fe9b80c05abe95c7 /tools/perf/scripts/python/task-analyzer.py
parentf07a320691348b75436be7b958884da7095b1386 (diff)
pinctrl: renesas: rzg2l: Allow more bits for pin configuration
The pin configuration bits have been growing for every new SoCs being added for the pinctrl-rzg2l driver which would mean updating the macros every time for each new configuration. To avoid this allocate additional bits for pin configuration by relocating the known fixed bits to the very end of the configuration. Also update the size of 'cfg' to 'u64' to allow more configuration bits in the 'struct rzg2l_variable_pin_cfg'. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S Link: https://lore.kernel.org/r/20240530173857.164073-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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