diff options
| author | Rob Herring <[email protected]> | 2024-08-26 13:38:48 -0500 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2024-09-05 11:46:42 +0000 |
| commit | 6e7fd890f1d6ac83805409e9c346240de2705584 (patch) | |
| tree | e9180857f159e60c0566914cf65616b14610d132 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 4f6dc10b7e4a2a747df425c01c87298673b9a512 (diff) | |
arm64: dts: toshiba: Fix pl011 and pl022 clocks
Arm Primecell blocks have a functional clock and a bus clock. The
Toshiba TMPV7708 only defines the bus clock (apb_pclk). Add the
"uartclk" and "sspclk" clocks to the PL011 and PL022 nodes,
respectively.
Signed-off-by: Rob Herring (Arm) <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions