diff options
| author | Xingyu Wu <[email protected]> | 2023-07-17 10:30:40 +0800 |
|---|---|---|
| committer | Conor Dooley <[email protected]> | 2023-07-20 17:22:30 +0100 |
| commit | 3e6670a28b009cc381b40ee26a6f41509aca46eb (patch) | |
| tree | 452792bdd82c09844dc1d0d726118239d012e6a3 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 3fcbcfc496f0cc08f9dc004a92915ce1cfb7ea95 (diff) | |
riscv: dts: starfive: jh7110: Add PLL clocks source in SYSCRG node
Add PLL clocks input from PLL clocks driver in SYSCRG node.
Reviewed-by: Emil Renner Berthing <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Signed-off-by: Xingyu Wu <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions