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author | Sebastian Reichel <sebastian.reichel@collabora.com> | 2023-06-16 19:00:21 +0200 |
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committer | Rob Herring <robh@kernel.org> | 2023-06-27 07:54:00 -0600 |
commit | 3216ceeb708b816ffacb19ae2387ac68bb872631 (patch) | |
tree | 86da85177e8422b08c21ab439b3c44a10766ae64 /tools/perf/scripts/python/task-analyzer.py | |
parent | 74f02dd73906f5a0e48dfc39b8f3adc03ad86274 (diff) |
dt-bindings: PCI: dwc: rockchip: Update for RK3588
The PCIe 2.0 controllers on RK3588 need one additional clock,
one additional reset line and one for ranges entry.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230616170022.76107-4-sebastian.reichel@collabora.com
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions