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authorDiogo Silva <[email protected]>2024-11-02 16:15:05 +0100
committerJakub Kicinski <[email protected]>2024-11-05 17:46:03 -0800
commit256748d5480bb3c4b731236c6d6fc86a8e2815d8 (patch)
tree3306561d1ff08466c5a573384166ca6be5c9eb16 /tools/perf/scripts/python/task-analyzer.py
parent9eaff63bfb59b93a79ac8450e3d1e45a1f72f29a (diff)
net: phy: ti: add PHY_RST_AFTER_CLK_EN flag
DP83848 datasheet (section 4.7.2) indicates that the reset pin should be toggled after the clocks are running. Add the PHY_RST_AFTER_CLK_EN to make sure that this indication is respected. In my experience not having this flag enabled would lead to, on some boots, the wrong MII mode being selected if the PHY was initialized on the bootloader and was receiving data during Linux boot. Signed-off-by: Diogo Silva <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Fixes: 34e45ad9378c ("net: phy: dp83848: Add TI DP83848 Ethernet PHY") Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
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