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| author | Manivannan Sadhasivam <[email protected]> | 2023-03-16 13:40:59 +0530 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2023-04-11 11:31:10 +0200 |
| commit | 2542e16c392508800f1d9037feee881a9c444951 (patch) | |
| tree | a33078b80748b61854469fa5602a0b78a3e9a64b /tools/perf/scripts/python/task-analyzer.py | |
| parent | fe15c26ee26efa11741a7b632e9f23b01aca4cc6 (diff) | |
PCI: qcom: Fix the incorrect register usage in v2.7.0 config
Qcom PCIe IP version v2.7.0 and its derivatives don't contain the
PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT register. Instead, they have the new
PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2 register. So fix the incorrect
register usage which is modifying a different register.
Also in this IP version, this register change doesn't depend on MSI
being enabled. So remove that check also.
Link: https://lore.kernel.org/r/[email protected]
Fixes: ed8cc3b1fc84 ("PCI: qcom: Add support for SDM845 PCIe controller")
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Cc: <[email protected]> # 5.6+
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
0 files changed, 0 insertions, 0 deletions