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| author | Arnd Bergmann <arnd@arndb.de> | 2024-05-02 14:56:42 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-05-02 14:56:43 +0200 |
| commit | 0ea32f50b36fd0372b3232db85d340294d7f0a8a (patch) | |
| tree | 7353ea0b60c7330d90397ba40dbc6496870362c1 /tools/perf/scripts/python/task-analyzer.py | |
| parent | 5c04a5b065e97dd331dba67da9896897fced3bee (diff) | |
| parent | 1eba0b61be72506549e79dd11a132b5d73aed094 (diff) | |
Merge tag 'riscv-sophgo-dt-for-v6.10' of https://github.com/sophgo/linux into soc/dt
RISC-V Devicetrees for v6.10
Sophgo:
Added sdhci support for cv18xx/duo.
Added clock support for cv18xx.
Added clock for uart/sdhci.
Added spi support for cv18xx.
Added i2c support for cv18xx.
Added reserved memory node for cv1800b/duo.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* tag 'riscv-sophgo-dt-for-v6.10' of https://github.com/sophgo/linux:
riscv: dts: sophgo: add reserved memory node for CV1800B
riscv: dts: sophgo: use real clock for sdhci
riscv: dts: sophgo: cv18xx: Add i2c devices
riscv: dts: sophgo: cv18xx: Add spi devices
riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC
riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC
riscv: dts: sophgo: add sdcard support for milkv duo
Link: https://lore.kernel.org/r/MA0P287MB2822CA2DE757787D6EA3B1F8FE192@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/task-analyzer.py')
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