diff options
author | Florian Fainelli <[email protected]> | 2022-01-07 10:46:14 -0800 |
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committer | Miquel Raynal <[email protected]> | 2022-01-23 16:37:19 +0100 |
commit | feca4cc4765a67907a97bddfa94aa6901cbbce7d (patch) | |
tree | 5e6e1d1e541d1b3a584f2728b203e98e12b17da5 /tools/perf/scripts/python/syscall-counts.py | |
parent | 5abd37f6e9d653b748a1acad7e0abcbe540e896a (diff) |
mtd: rawnand: brcmnand: Add BCMA shim
Add a BCMA shim to allow us to register the brcmnand driver using the
BCMA bus which provides indirect memory mapped access to SoC registers.
There are a number of registers that need to be byte swapped because
they are natively big endian, coming directly from the NAND chip, and
there is no bus interface unlike the iProc or STB platforms that
performs the byte swapping for us.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions