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authorStefan Agner <[email protected]>2016-03-22 15:45:29 -0700
committerStefan Agner <[email protected]>2016-04-25 20:27:18 -0700
commitf93500f430733178dfd8f9c80e52b13d0f273dd3 (patch)
tree8bedc70a345953ae14aeb90647790df7b7cab5b0 /tools/perf/scripts/python/syscall-counts.py
parent73fa30337a936695eeebecfa2c48ff567361c793 (diff)
drm/fsl-dcu: add extra clock for pixel clock
The Vybrid DCU variant has two independent clock inputs, one for the registers (IPG bus clock) and one for the pixel clock. Support this distinction in the DCU DRM driver while staying backward compatible for old device trees. Acked-by: Rob Herring <[email protected]> Signed-off-by: Stefan Agner <[email protected]>
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