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| author | Vadim Pasternak <[email protected]> | 2022-04-13 18:17:26 +0300 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2022-04-15 11:06:12 +0100 |
| commit | e5b6a5bac8cc12790eccf69e01372e135f9e4af2 (patch) | |
| tree | c05f9dd4e0fa9c8ae3f7c8c94ad24eb9549e8b3e /tools/perf/scripts/python/syscall-counts.py | |
| parent | 349454526f5fe6488083c35306b04acd0d065bbb (diff) | |
mlxsw: core: Extend port module data structures for line cards
The port module core is tasked with module operations such as setting
power mode policy and reset. The per-module information is currently
stored in one large array suited for non-modular systems where only the
main board is present (i.e., slot index 0).
As a preparation for line cards support, allocate a per line card array
according to the queried number of slots in the system. For each line
card, allocate a module array according to the queried maximum number of
modules per-slot.
Signed-off-by: Vadim Pasternak <[email protected]>
Signed-off-by: Ido Schimmel <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions