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authorPaul Burton <[email protected]>2024-10-19 09:10:30 +0200
committerDaniel Lezcano <[email protected]>2024-11-13 13:49:33 +0100
commitdfe101bcad840d025deb5e43150d54050ab7724d (patch)
treee30e52f5bc8f08644e1b7fec85e23ea2db529f47 /tools/perf/scripts/python/syscall-counts.py
parent314413317b6d78cc76cd48f0296fde9fcfdec400 (diff)
clocksource/drivers/mips-gic-timer: Always use cluster 0 counter as clocksource
In a multi-cluster MIPS system, there are multiple GICs - one in each cluster - each of which has its independent counter. The counters in each GIC are not synchronized in any way, so they can drift relative to one another through the lifetime of the system. This is problematic for a clock source which ought to be global. Avoid problems by always accessing cluster 0's counter, using cross-cluster register access. This adds overhead so it is applied only on multi-cluster systems. Signed-off-by: Paul Burton <[email protected]> Signed-off-by: Chao-ying Fu <[email protected]> Signed-off-by: Dragan Mladjenovic <[email protected]> Signed-off-by: Aleksandar Rikalo <[email protected]> Tested-by: Serge Semin <[email protected]> Acked-by: Thomas Bogendoerfer <[email protected]> Tested-by: Gregory CLEMENT <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Daniel Lezcano <[email protected]>
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