diff options
| author | Markos Chandras <[email protected]> | 2015-07-09 10:40:50 +0100 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2015-08-26 15:23:17 +0200 |
| commit | c982c6d6c48b48159db481581cadbb8773219677 (patch) | |
| tree | 78fdd17d2a30c16fb6a09cf709f01d22e2104c90 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 6f50c83529ac1fa3444ff4be5f5b0bf3d76db678 (diff) | |
MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB
We are so early in the boot process where we really don't want to
stall and wait for CP0 FTLB related changes become visible so just drop
the cp0 hazard barrier.
Signed-off-by: Markos Chandras <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/10649/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions