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authorFabrizio Castro <fabrizio.castro@bp.renesas.com>2018-02-12 17:44:28 +0000
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-02-20 13:35:23 +0100
commitc43d8630fe1a6bb09e005d38793346d989aa4dad (patch)
tree6387bdd5b5ec9b75d9d09bb2dd0a14e888db88d9 /tools/perf/scripts/python/syscall-counts.py
parent5ada6bee8c966bf7bdc23512d1571adaeea22f0b (diff)
clk: renesas: r8a7794: Add rwdt clock
Add "rwdt" clock to r8a7794_mod_clks. Also, since we may need to access the watchdog registers at any time, declare the clock as critical. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
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