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authorVictor Lu <[email protected]>2023-08-08 13:57:16 -0400
committerAlex Deucher <[email protected]>2023-11-09 17:01:10 -0500
commitbc3c566071c8504f5d7c73a4171ead394f097639 (patch)
treee721025135df1e264d7df959a2afbd406e5838bb /tools/perf/scripts/python/syscall-counts.py
parentf64c3fce460469cd356ccb5c91d0bcbd1b9bc403 (diff)
drm/amdgpu: Add xcc param to SRIOV kiq write and WREG32_SOC15_IP_NO_KIQ (v4)
WREG32/RREG32_SOC15_IP_NO_KIQ and amdgpu_virt_kiq_reg_write_reg_wait are not using the correct rlcg interface or mec engine, respectively. Add xcc instance parameter to them. v4: Use GET_INST and squash commit with: "drm/amdgpu: Add xcc_inst param to amdgpu_virt_kiq_reg_write_reg_wait" v3: xcc not needed for MMMHUB v2: rebase Signed-off-by: Victor Lu <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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