ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance

There are two instances of PCIe PHY in DRA7xx. So renamed
optfclk_pciephy_32khz, optfclk_pciephy_clk and optfclk_pciephy_div_clk to
optfclk_pciephy1_32khz, optfclk_pciephy1_clk and optfclk_pciephy1_div_clk
respectively. This is needed for adding the clocks for second PCIe PHY
instance.

Cc: Rajendra Nayak <[email protected]>
Cc: Tero Kristo <[email protected]>
Cc: Paul Walmsley <[email protected]>
Cc: Tony Lindgren <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Pawel Moll <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Kumar Gala <[email protected]>
Signed-off-by: Keerthy <[email protected]>
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>

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