aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/syscall-counts.py
diff options
context:
space:
mode:
authorConor Dooley <conor.dooley@microchip.com>2024-01-22 12:19:53 +0000
committerConor Dooley <conor.dooley@microchip.com>2024-02-06 14:07:18 +0000
commitb67dae390918bc28a5377a3af8aeafb1d0f4036e (patch)
treee1a8bc491aac7c7e87d0d26e63e6762ace103fba /tools/perf/scripts/python/syscall-counts.py
parent66736997c231c78c2bb6c6f2bdabffd3df88b19c (diff)
clk: microchip: mpfs: add missing MSSPLL outputs
The MSSPLL has 4 outputs, of which only the cpu/axi/ahb clock parent is currently implemented. Add the CAN clock too, as that'll be needed by the driver for the CAN controller and uses output 3. While we are here, the other two missing clocks, used by the eMMC/SD controller and by the "user crypto". Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions