diff options
| author | Martin Schwidefsky <[email protected]> | 2015-08-20 12:57:33 +0200 |
|---|---|---|
| committer | Martin Schwidefsky <[email protected]> | 2015-10-14 14:32:06 +0200 |
| commit | acdc9fc9a8121ce2ebcd7533bd72852c20b353f3 (patch) | |
| tree | b1d501fa146502365256a02ac6aa3352ced890fa /tools/perf/scripts/python/syscall-counts.py | |
| parent | 5614dd920a02a524c9abc9573374d81f0535f18a (diff) | |
s390/bitops: implement cache friendly test_and_set_bit_lock
The generic implementation for test_and_set_bit_lock in include/asm-generic
uses the standard test_and_set_bit operation. This is done with either a
'csg' or a 'loag' instruction. For both version the cache line is fetched
exclusively, even if the bit is already set. The result is an increase in
cache traffic, for a contented lock this is a bad idea.
Acked-by: Hendrik Brueckner <[email protected]>
Signed-off-by: Martin Schwidefsky <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions