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authorVille Syrjälä <[email protected]>2017-11-23 21:04:59 +0200
committerVille Syrjälä <[email protected]>2018-01-23 17:58:56 +0200
commita7d08ff19c14a717fe82769eaa3083aac5cf9db4 (patch)
treef6ad4083e924ebb7e916a2d8c8f706092621d739 /tools/perf/scripts/python/syscall-counts.py
parentc2d6e243ff3301284087b603d2b9fb6c38568bfe (diff)
drm/tegra/dc: Use drm_mode_get_hv_timing() to populate plane clip rectangle
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). v2: Rebase due to tegra_plane_state_add() relocating to plane.c Cc: Laurent Pinchart <[email protected]> Cc: Thierry Reding <[email protected]> Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Acked-by: Thierry Reding <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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