diff options
| author | Lucas De Marchi <[email protected]> | 2023-09-05 18:20:50 -0700 |
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2023-12-21 11:41:03 -0500 |
| commit | a2112949e5f96c1b95aedfb9e2f0401e6c4f864f (patch) | |
| tree | 3358da5f676d80872dc61aed88b5bdeb65c27467 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 8bc454baf4036f4684bf30951dc3f6d96eb93f5f (diff) | |
drm/xe/reg_sr: Simplify check for masked registers
For all RTP actions, clr_bits is a superset of the bits being modified.
That's also why the check for "changing all bits" can be done with
`clr_bits + 1`. So always use clr_bits for setting the upper bits of a
masked register.
Reviewed-by: Matt Roper <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lucas De Marchi <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions