diff options
| author | Vijay Purushothaman <[email protected]> | 2012-09-27 19:13:01 +0530 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2012-09-28 16:42:52 +0200 |
| commit | 9473c8f485e1e3740d5aebf1de4838b615f9dedc (patch) | |
| tree | 545c8f135d6f3ef81fd027811d28ce21b1cd347c /tools/perf/scripts/python/syscall-counts.py | |
| parent | 3bcedbe5f2a3da65326d99803cac71c1e89bc93f (diff) | |
drm/i915: Set aux clk to 100MHz for Valleyview
Set hrawclk to 200 MHz and aux divider clock to 100 MHz for Valleyview.
This enables the aux transactions in Valleyview.
Signed-off-by: Vijay Purushothaman <[email protected]>
Signed-off-by: Ben Widawsky <[email protected]>
Acked-by: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions