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| author | Atish Patra <atishp@rivosinc.com> | 2024-08-16 00:08:08 -0700 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-08-19 08:58:19 +0530 |
| commit | 7d1ffc8b087e97dbe1985912c7a2d00e53cea169 (patch) | |
| tree | 3c159d26fe929dd223687b45dbfac2613f334380 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 47d40d93292d9cff8dabb735bed83d930fa03950 (diff) | |
RISC-V: KVM: Allow legacy PMU access from guest
Currently, KVM traps & emulates PMU counter access only if SBI PMU
is available as the guest can only configure/read PMU counters via
SBI only. However, if SBI PMU is not enabled in the host, the
guest will fallback to the legacy PMU which will try to access
cycle/instret and result in an illegal instruction trap which
is not desired.
KVM can allow dummy emulation of cycle/instret only for the guest
if SBI PMU is not enabled in the host. The dummy emulation will
still return zero as we don't to expose the host counter values
from a guest using legacy PMU.
Fixes: a9ac6c37521f ("RISC-V: KVM: Implement trap & emulate for hpmcounters")
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240816-kvm_pmu_fixes-v1-1-cdfce386dd93@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions