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authorMika Kuoppala <[email protected]>2015-01-16 11:34:39 +0200
committerDaniel Vetter <[email protected]>2015-01-27 09:50:56 +0100
commit756c349dc947e5d8e0938f2af63c3a6dec038261 (patch)
tree67e58c9f522d1404189b000d4c6217f53fbcae07 /tools/perf/scripts/python/syscall-counts.py
parent05a2fb157e44a53c79133805d30eaada43911941 (diff)
drm/i915: Make vlv and chv forcewake put generic.
These two were using a fw dance logic where posting read was done after both domain bit were set. When in other gens, the posting read is done immediately after setting the forcewake bit for each domain. Now bring these in line with other gens. Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Deepak S <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
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