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authorDmitry Baryshkov <[email protected]>2023-02-01 19:23:04 +0200
committerBjorn Andersson <[email protected]>2023-02-08 17:48:55 -0800
commit658c82caffa042b351f5a1b6325819297a951a04 (patch)
treee865809b99de3642070045d6ea4ac137f8505ad6 /tools/perf/scripts/python/syscall-counts.py
parent1519c0a9ab90a239c52d8a6d3e7ef78537868496 (diff)
clk: qcom: gpucc-sc7180: fix clk_dis_wait being programmed for CX GDSC
The gdsc_init() function will rewrite the CLK_DIS_WAIT field while registering the GDSC (writing the value 0x2 by default). This will override the setting done in the driver's probe function. Set cx_gdsc.clk_dis_wait_val to 8 to follow the intention of the probe function. Fixes: 745ff069a49c ("clk: qcom: Add graphics clock controller driver for SC7180") Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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