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| author | Tony Cheng <[email protected]> | 2017-09-27 09:20:51 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2017-10-21 16:44:13 -0400 |
| commit | 6512387a54357c5d3fbea8995d8879ea817a5ec6 (patch) | |
| tree | 825e2e0b27725caf9f4f7eec8d0a72dbe08b973c /tools/perf/scripts/python/syscall-counts.py | |
| parent | 8740196935625dfb171ab115120315060e4a8a41 (diff) | |
drm/amd/display: align DCLK to voltage level
in past program SMU will use all voltage headroom. RV does not
if DAL need higher voltage for DCFCLK or DISPCLK, also increase FCLK
to improve stutter as voltage is already
Signed-off-by: Tony Cheng <[email protected]>
Reviewed-by: Charlene Liu <[email protected]>
Acked-by: Harry Wentland <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions