diff options
| author | Abel Vesa <[email protected]> | 2023-02-08 20:00:12 +0200 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2023-02-10 22:28:00 +0530 |
| commit | 5f705402739c87b682861f8f06751a8218f52065 (patch) | |
| tree | ce4871fdebdfb66eb13a9b6c75bd19a47d29d30a /tools/perf/scripts/python/syscall-counts.py | |
| parent | efecba3c9f076010701143634c6bf9a75b723107 (diff) | |
phy: qcom-qmp: pcs: Add v6.20 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for
PCIE g4x2. Add the new PCS offsets in a dedicated header file.
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions