diff options
| author | Huazhong Tan <[email protected]> | 2020-05-09 17:27:37 +0800 |
|---|---|---|
| committer | Jakub Kicinski <[email protected]> | 2020-05-10 19:43:22 -0700 |
| commit | 5705b45155c404a1eb2ccc92e95851cfa21d4f37 (patch) | |
| tree | 5082761a268cb45a0c31a867c5b476fe938dacdc /tools/perf/scripts/python/syscall-counts.py | |
| parent | bed37f0ba6bc1ff702d87be727d9e740509809aa (diff) | |
net: hns3: remove a redundant register macro definition
HCLGE_MISC_VECTOR_INT_STS and HCLGE_VECTOR_PF_OTHER_INT_STS_REG
both represent the misc interrupt status register(0x20800), so
removes HCLGE_VECTOR_PF_OTHER_INT_STS_REG and replaces it with
HCLGE_MISC_VECTOR_INT_STS.
Signed-off-by: Huazhong Tan <[email protected]>
Signed-off-by: Jakub Kicinski <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions