diff options
| author | Vandana Kannan <[email protected]> | 2014-11-04 17:06:47 +0000 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2014-11-07 18:42:07 +0100 |
| commit | 4f94738674b813fe0ef8e7dbef8a24aeb8c2271a (patch) | |
| tree | 44013994fc1143e6ad96257bb0f4aefa58f84603 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 367294be7c257dd4d8d8f0e296aa9824eae18568 (diff) | |
drm/i915/gen9: Disable WM if corresponding latency is 0
According to updated BSpec, If level 1 or any higher level has a value of 0x00,
that level and any higher levels are unused and the associated watermark
registers must not be enabled.
This patch checks for latency 0 for level >=1 and does not enable WM
corresponding to level m | m>=n, if level n (n != 0) has a 0us latency.
v2: Satheesh's review comments
- zero-out latency values (for all higher levels if latency of given
level is zero ) in read_wm_latency() function itself
v3: removed redundant check as per Satheesh's observation.
v4: rebase on top before merging (Damien)
v5: Rebase on top of the default value removal (Ville)
Reviewed-by: Satheeshakrishna M <[email protected]> (v3)
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Damien Lespiau <[email protected]>
Signed-off-by: Vandana Kannan <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions