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| author | Kishon Vijay Abraham I <[email protected]> | 2019-12-16 15:27:00 +0530 |
|---|---|---|
| committer | Kishon Vijay Abraham I <[email protected]> | 2020-01-08 12:58:06 +0530 |
| commit | 372428db44cf8666ff07fa349d305c1be35cb7d4 (patch) | |
| tree | 5dd99223b9e714201199c44ab29ce46f1b51b0c2 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 56d34730c1a220d5015b672088e95f99e8b83b1f (diff) | |
phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional resources
Certain platforms like TI J721E using Cadence Sierra Serdes
doesn't provide explicit phy_clk and reset (APB reset) control.
Make them optional here.
Signed-off-by: Kishon Vijay Abraham I <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions