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authorJosé Roberto de Souza <jose.souza@intel.com>2021-01-13 05:37:59 -0800
committerJosé Roberto de Souza <jose.souza@intel.com>2021-01-14 08:04:40 -0800
commit35f0837e068232f1cd579165f8a03852dcbf9f1f (patch)
treef79dc4f6747cd2c153cfc5c96b2d9ecfb31a7c31 /tools/perf/scripts/python/syscall-counts.py
parentd70920adf9f29a5f1546847022b9034adfd8bea1 (diff)
drm/i915/dg1: Apply WA 1409120013 and 14011059788
DG1 is missing those two WA so instead of copy and paste it to the DG1 function, here calling the function that implements it. While at it also renaming tgl_init_clock_gating to gen12lp_init_clock_gating as it is also used by DG1, RKL and ADL-S. Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210113133759.72055-1-jose.souza@intel.com
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