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authorHeikki Krogerus <[email protected]>2013-01-10 11:25:09 +0200
committerGreg Kroah-Hartman <[email protected]>2013-01-15 23:03:00 -0800
commit30046df261875dfeaf92b44fe5cd6cde9716a561 (patch)
tree539468ef71031900eedfaf6f4b2116ea62d18f32 /tools/perf/scripts/python/syscall-counts.py
parenta7260c8ce07d06da4cbb09120b4e9e8074d122cc (diff)
serial: 8250_dw: Set FIFO size dynamically
Designware UART provides optional Component Parameter Register that lists most of the capabilities of the UART, including FIFO size. This uses that register to set FIFO size for the port before registering it. Signed-off-by: Heikki Krogerus <[email protected]> Reviewed-by: Jamie Iles <[email protected]> Acked-by: Alan Cox <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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