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| author | Ville Syrjälä <[email protected]> | 2015-04-10 18:21:27 +0300 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2015-05-08 15:55:22 +0200 |
| commit | 2e523e98bb593950de2c749d4ceb45cc20313c1a (patch) | |
| tree | 7e6263ccf6e240558843bcc88df1d09eafeeccad /tools/perf/scripts/python/syscall-counts.py | |
| parent | ac935a8b6db00079e2de65cadf4c735ed8f0175b (diff) | |
drm/i915: Implement chv display PHY lane stagger setup
Set up the chv display PHY lane stagger registers according to
"Programming Guide for 1273 CHV eDP/DP/HDMI Display PHY" v1.04
Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Deepak S <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions